Keysight Technologies announced it has extended its collaboration with Synopsys with the integration of PathWave RFIC Design (GoldenGate) with Synopsys Custom Compiler design environment and Synopsys PrimeSim circuit simulation solutions.
This will enable designers to validate complex radio frequency (RF) and millimeter wave design requirements for 5G/6G system-on-chip (SoC) and subsystem designs in the Synopsys Custom Design Family.
The complexity of design requirements for radio frequency integrated circuits (RFICs) that are used for wireless data transmission, such as transceivers and RF front-end components, continues to grow. Next-generation wireless systems target a range of new capabilities including higher bandwidth, more connected devices, lower latency and better coverage. To address these requirements, designers need to simulate and measure RF performance to a greater level of accuracy.
The integration of PathWave RFIC Design (GoldenGate) simulation software, which models complex integrated circuits, with Synopsys Custom Compiler, part of the Synopsys Custom Design Family of products, addresses this challenge by enabling designers to achieve power and performance optimizations and efficiently deliver 5G and 6G designs.
Integration of Keysight’s PathWave RFIC Design (GoldenGate) into the Synopsys environment and Custom Compiler design workflow provides customers with an enterprise-grade solution for RF and wireless design, delivering the following key benefits:
- Complementary, high-capacity RFIC simulation solutions to validate complex SoCs with accurate electromagnetic (EM) models for RF and millimeter-wave design blocks.
- Improved productivity with defined common testbenches, measurements and simulation setup.
- Ability to meet complex RF and millimeter-wave design requirements to facilitate the creation of 5G and 6G SoC and subsystem designs.
- Compact test signals and fast distortion EVM simulations for both design and verification of RF circuits using modulated signals.
- An energy-efficient design that improves power optimization, thermal, mechanical heat stress and battery life.
This marks a continuation of Keysight’s strategic partnership with Synopsys, which recently integrated Keysight’s PathWave RFPro with the Synopsys Custom Compiler design environment, enabling customers to rapidly and accurately design wireless chips using TSMC’s N6RF Design Reference Flow.
Koji Tomioka, VP at Asahi Kasei Microdevices Corporation
We are migrating our RF design environment to industry-leading commercial tools and workflows based on the Synopsys Custom Compiler design and layout solution. Keysight’s RFIC design tool integrated with Custom Compiler provides best-in-class layout and simulation capabilities to design and verify our millimeter-wave radar chips.
Niels Faché, VP and GM of Keysight’s PathWave Software Solutions
Native integration of Keysight’s PathWave RFIC Design (GoldenGate) with Synopsys’ Custom Compiler extends our collaboration to address end-to-end workflows for increasingly complex wireless designs. This integration enables customers to access Harmonic Balance and Envelope simulation capabilities, as well as Keysight’s Virtual Test Benches, to reliably compute error vector magnitude and adjacent channel power ratio early in the chip design and verification process.
