Ethernity Networks announced the introduction of the ENET 4820ZXP/99 distribution point unit (DPU) flow processor, the latest addition to its FPGA-based G.fast System-on-Chip (SoC) family for the broadband market.
The flexible new flow processor is unique in offering a 10G G.999.1 interface and integrated XGS-PON ONU MAC on a single low-cost FPGA SoC.
The ENET 4820ZXP/99 is specially optimized for next generation G.fast broadband services, supporting up to 24 modems through 10G G.999.1 channelized Ethernet and featuring an integrated XGS-PON ONU MAC, Carrier Ethernet switch, packet processing, traffic management with external buffering, and EFM bonding.
The flow processor is implemented on an FPGA SoC with integrated dual-core ARM CPU and programmable logic. It also offers DPU cascading to support a total of up to 48 G.fast modems.
The integration of all these capabilities into a single FPGA SoC is only possible because of Ethernity’s patented technology that enables an extremely efficient architecture, resulting in 80 percent die size reduction. This allows integration into a low-cost FPGA that is competitive with ASIC solutions.
The ENET 4820ZXP/99 is also designed for especially low power consumption to enable reverse power feeding (RPF), further optimizing the overall solution cost.
The ENET4820ZXP/99 is the latest addition to the Ethernity ENET Z/99 G.fast Flow Processor family, which also includes the scale-up ENET48xxZ/99, supporting up to 256 G.fast modems through G.999.1 over 10G interfaces, perfect for multiple port and chassis solutions. Additional customization of ports and throughput per device is also possible.
The ENET 4820ZXP/99 will be available in March of 2019, and customers can now begin designing their FPGA-based G.fast solution with Ethernity’s comprehensive development kit and evaluation board.